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  • Polyrhythmic Clock Divider

  • Random / Looping Sequencer

  • Chaotic Stepped Signal Generator

  • 12hp

  • 35mm deep

  • +12V 58mA 

  • -12V 42mA

  • Complete redesign of the 2018 module, building on the original features in multiple ways:

    • Universal shift register - can shift data in two directions​

    • Dual gate bus with three position switches

    • CV over pattern length, shift direction and chance of loop

    • Analogue noise output

    • Clock pulse width affects all outputs

    • 1-bit, 3-bit and 8-bit data encodings

    • All solid state and discrete logic, runs at wide bandwidth

    • Expander ports for upcoming dual oscillator, cv addressable clock divider, bit sieve and random voltage sources

​Rung Divisions combines a universal shift register, a “divide by n” pulse divider, analogue noise, and several logic and binary operations. These functions synthesise an array of predictable and unpredictable digital signals at arbitrary time scale. 

Rung Divisions’ primary use is as a complex polyrhythmic gate generator that drives a chaotic / pseudo random / looping stepped cv pattern generator, with voltage control over the pattern “direction”, length, and chance of the pattern looping. The combination of these features can be used to generate auditory illusions similar to a stroboscopic effect – like the visual aliasing of a wheel that appears to stand still and reverse direction at speed. Rung Divisions is built with solid state & discrete logic blocks to work at frequencies between 0–40kHz. The module is designed to drive multiple voices with gate patterns and CV, or to generate audio rate mayhem - these functions can be combined through patching with other modules that can take input signals over a wide frequency range.

Rung Divisions behaves in many surprising ways with feedback and self patching - the module has propagation delay compensation to allow for all outputs to be used in feedback loops.

£275 excl. VAT

£330 incl. UK VAT @ 20%

Drums driven by Bus1, Bus2, 1-Bit Outputs, CV from 3-Bit and 8-Bit outputs, change in divisions sent to the gate busses, reset input from /7:

Two oscillators sequenced by 3-Bit and 8-Bit outputs, gradual decrease of chance paramter:

Two OP FM sequenced with clock feedback, gradual length parameter change:

"Benjolin" type patch with clock and data feedback, 8-Bit output to wavefolder, various parameter changes:

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